1. Technical Field
This invention relates generally to the field of semiconductors and, more particularly, to approaches for using a low resistivity metal (e.g., tungsten (W)) in a recessed gate structure for semiconductor devices such as planar or FinFET devices.
2. Related Art
Along with other metals, Tungsten (W) is actively being explored as a possibly gate metal. In general, replacement metal gates (RMGs) are attractive due to superior T(inv)-V(t) performance. One approach is to attempt to provide a recessed gate structure. However, forming a W recess is currently an expensive process, as the process typically involves chemical mechanical polishing (CMP) and a reaction ion etch (RIE) chamber for W etching. For example, a typical approach may include a series of expensive and/or time-consuming deposition processes, CMP processes, and RIE processes. Moreover, existing techniques typically recess liner layers and gate metals evenly, which results in reduced metal contact and increased resistance.